The ASIC, which is utilised to enhance the capability of the DSP, is in charge of current sampling, A/D conversions, the PWM switching mechanism and the input buffers of the encoder signals. The control scheme shown in Fig. 1 mainly consists of a CCPWM scheme, an indirect field-orientation mechanism, a field-weakening scheme and a speed control scheme. The former three parts are designed such that the field-weakened IFO induction motor possesses good torque generating capability. The speed control is applied to yield a good speed dynamic response.
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