Recall that the basic equation for the capacitance of a parallel-plate capacitor is defined by C = cA/d, where c is the permittivity of the dielectric (insulator) between the plates of area A separated by a distance d. In the reverse-bias region there is a depletion region (free of carriers) that behaves essentially like an insulator between the layers of opposite charge. Since the depletion width (d) will increase with increased reverse-bias potential, the resulting transition capacitance will decrease, as shown in Fig. 1.37. The fact that the capacitance is dependent on the applied reverse-bias potential has application in a number of electronic systems. In fact, in Chapter 20 a diode will be introduced whose operation is wholly dependent on this phenomenon. Although the effect described above will also be present in the forward-bias region, it is overshadowed by a capacitance effect directly dependent on the rate at which charge is injected into the regions just outside the depletion region. The result is that increased levels of current will result in increased levels of diffusion capacitance. However, increased levels of current result in reduced levels of associated resistance (to be demonstrated shortly), and the resulting time constant (r = RC ), which is very important in high-speed applications, does not become excessive.
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